Hardware Based Loop Optimization for CGRA Architectures

Chilankamol Sunny (1) , Satyajit Das (1) , Kevin Martin (2, 3) , Philippe Coussy (2, 3)

1 ITT Palakkad - Indian Institut of Technology [Palakkad]
2 Lab-STICC_ARCAD - Equipe Hardware ARchitectures and CAD tools
3 UBS Lorient - Université de Bretagne Sud - Lorient

Domaines: Architectures Matérielles [cs.AR]

Chilankamol Sunny, Satyajit Das, Kevin Martin, Philippe Coussy. Hardware Based Loop Optimization for CGRA Architectures. Applied Reconfigurable Computing. Architectures, Tools, and Applications, Jun 2021, Rennes, France. pp.65-80, ⟨10.1007/978-3-030-79025-7_5⟩. ⟨hal-03345346⟩